The present invention relates to a semiconductor device and a method of manufacturing the same. Particularly, the present invention is concerned with a technique which is effectively applicable to a resin-sealed type semiconductor device.
As a resin package wherein a semiconductor chip mounted on a lead frame is sealed with a sealing member of a molded resin there is known a QFN (Quad Flat Non-leaded package) (see, for example, Patent Literatures 1 and 2).
The QFN is of a structure wherein one ends of plural leads which are electrically connected to a semiconductor chip through bonding wires are exposed from a back surface (underside) of an outer peripheral portion of a sealing member to constitute terminals, and bonding wires are connected to the surfaces opposite to the exposed surfaces of the terminals, i.e., to terminal surfaces in the interior of the sealing member, to connect the terminals and the semiconductor chip electrically with each other. By soldering these terminals to electrodes (foot print) of a wiring substrate, the semiconductor chip is mounted. This structure is advantageous in that the packaging area is smaller than that in a QFP (Quad Flat Package) wherein leads extend laterally from side faces of a package (a sealing member) to constitute terminals.
[Patent Literature 1]
Japanese Unexamined Patent Publication No. 2001-189410
[Patent Literature 2]
Japanese Patent No. 3072291